Probabilistic CMOS Technology For Cognitive Information Processing∗

Over the next decade the DoD will be challenged to deploy cognitive information processing systems that will embody learning and reasoning using semantically rich knowledge representations in applications such as autonomous vehicles, intelligence analysts, and electronic surveillance. In addition to the significant computational demands, cognitive applications must deal with uncertainty and inexact information and as a result probabilistic models have been central to many widely used cognitive kernels. Examples include Bayesian inference [7], probabilistic cellular automata, and randomized neural networks [4]. Further, as device scaling moves into the nanometer regime two significant technology challenges faced by embedded cognitive systems are the impact of noise and the significance of lower energy consumption, especially for mobile and autonomous embedded devices. These issues present significant challenges to the ability to sustain the performance benefits of Moore’s Law over the next decade [8, 10, 5]. We can expect the innovation of novel computing architectures that are able to synergistically combine advances in device technology, algorithms, and new architectural primitives to deliver cognitive information processing systems that operate within the required size, weight, energy, and execution time constraints. In our current work we have innovated the concept of a probabilistic device or switch, whose output is guaranteed to be correct with a probability p, 1/2 < p ≤ 1 (where p is considered to be unity in the context of all conventional computing switches, in that the device is deemed to compute correctly and hence without error). We have shown how such devices can trade-off energy consumption with the probability of correctness [6]. Such devices can be fabricated using conventional CMOS technology and are referred to as probabilistic CMOS or PCMOS devices. We discuss how PCMOS devices can be used to build architectural solutions, probabilistic system-on-a-chip PSOC, to provide ultra-low energy architectures that are naturally matched to probabilistic components of cognitive applications. We discuss the impact of this technology in the cognitive domain and address future trends.